1. Field of the Invention
The present invention relates to information processing apparatuses, information processing methods, and computer programs. More particularly, the present invention relates to an information processing apparatus that has a multiprocessing structure and performs data processing using a plurality of processors, an information processing method, and a computer program.
2. Description of the Related Art
In recent years, there have been an increasing number of multiprocessor information processing apparatuses that have a plurality of processors (central processing units (CPUs)) and realize efficient data processing by performing parallel processing using the processors. However, in such a multiprocessor environment, for example, a problem may occur when device drivers corresponding to various devices, such as a network card and a video card, are simultaneously run on the processors.
For example, when the processors simultaneously run device drivers corresponding to one network card, the processors change the state of the device (network card) in accordance with the progress situations of individual processes performed by the processors. As a result, an error occurs in at least one process (e.g., data communication). As has been described above, when device drivers are simultaneously run on the processors, the device state and process progression become inconsistent, and accordingly, a failure occurs not only in the operation of the device but also in the operation of the entire system.
Some measures have been proposed to solve the foregoing problem in the multiprocessor system. One measure is a method of performing exclusive control of device access. For example, Japanese Unexamined Patent Application Publication No. 06-223047 (Toshiba Corporation) discloses a system control method that, when it turns out to be that the cause of a failure resulting from exclusive control resides in a device driver, causes that driver to be runnable only on a single processor.
Also, Japanese Unexamined Patent Application Publication No. 09-160883 (Hitachi, Ltd.) discloses a structure that, when a terminal including a plurality of processors communicates with another terminal via a network, avoids stopping of the processors due to hardware contention by setting a device driver to be allocated to a single processor at all times or on a job-by-job basis.
However, these available techniques of the related art are solving methods based on the assumption that device drivers simultaneously running on a plurality of processors are common. In other words, these are methods for solving the problem of a system with a symmetric multiprocessing (SMP) environment.
Multiprocessor systems include, besides the above-described SMP systems, asymmetric multiprocessing (ASMP) systems.
The ASMP performs processing in a multiprocessor environment in which different roles are set to a plurality of CPUs. In such an ASMP environment, for example, one main processor is provided, and at the same time, a plurality of sub-processors are provided. The processors are used in the following manner:    (1) The main processor performs processing based on the operating system (OS); and    (2) Each sub-processor executes partial, specialized processing, such as encoding/decoding, digital signal processing (DSP) specialized for sounds and images, or communication processing.
These processing functions are distributed, thereby efficiently executing various processes.
In the ASMP system, unlike the SMP system, device drivers simultaneously running on a plurality of processors are not necessarily common; device drivers with different specifications may be used in the processors. In the structure where such device drivers with different architectures are used in the processors, even if the foregoing available methods of the related art are employed, processing errors are highly likely to occur.
One specific example of the ASMP system is “Cell” developed by Sony Corporation and the like. Cell is shorthand for “Cell Broadband engine Architecture”. Cell has a plurality of processor elements. That is, Cell includes the following:    (a) one main processor element (powerPC processor element (PPE)) including a main processor (power processing unit (PPU)); and    (b) multiple (e.g., eight) sub-processor elements (synergistic processor elements (SPEs)) including sub-processors (synergistic processing units (SPUs)).
These elements adopt individually different architectures.
In such an ASMP environment, device drivers on the processor elements may have different structures. Therefore, the methods disclosed in the foregoing Japanese Unexamined Patent Application Publication Nos. 06-223047 and 09-160883 for solving the problem in the SMP environment are not employable. That is, when a situation where device drivers simultaneously run on a plurality of processors occurs, the problem that not only the corresponding device but also the entire system does not operate properly occurs.
A processing example in which network communication is to be performed using a device driver corresponding to a network card in an ASMP information processing apparatus will be described. The example described below is a -processing example where the device driver corresponding to the network card is set up only on the main processor (PPU).
FIG. 1 shows an example of a processing hierarchy. As shown in FIG. 1, a network card 101 that performs data communication serves as the bottom layer. Above the bottom layer, processors that perform data processing are set. A main processor (PPU) 111 is a main processor that performs the OS. Sub-processors (SPU)-n 121 are processors that perform processes individually allocated thereto.
Besides performing the OS, the main processor (PPU) 111 performs, for example, control of a program 130 including a device driver 131 corresponding to a network card and a protocol stack 132 corresponding to a communication protocol, such as Transmission Control Protocol/Internet Protocol (TCP/IP). An application 140 that requests execution of communication processing is set as the top layer. As shown in FIG. 1, the protocol stack 132 and the device driver 131 run on the main processor (PPU) 111 together with the OS. An interrupt from the network card 101 is processed in the main processor (PPU) 111.
When communication processing is to be performed, packets to be sent/received are necessary to be exchanged between a network card and a memory serving as an obtaining source of data to be sent or as a storage destination of received data. In such a case, a descriptor such as that shown in FIG. 2 is used. A descriptor is identification data for memory access. For example, as shown in FIG. 2, a descriptor includes information such as an address (high) indicating the most significant 32 bits and an address (low) indicating the least significant 32 bits of a recording start address on a memory, which indicates in which place of the memory packets constituting communication data are placed, and 16-bit length information indicating the packet length.
In the information processing apparatus shown in FIG. 1, as has been described above, the main processor (PPU) 111, which is a main processor that controls the OS, processes an interrupt from the network card 101.
FIG. 3 shows a structure example of the network-card-corresponding device driver 131 of the main processor (PPU) 111. The device driver 131 includes an initializing unit 151 that performs initialization processing in communication processing, such as reserving a memory and setting an IP address; a main processing unit 152 that performs data sending/reception processing using a network card; an interrupt processing unit 153 that controls interrupt processing of an interrupt for the main processor (PPU) 111, which is performed at the time of communication using a network card; and a state holding unit 154 including a link-state holding unit 155 that holds a state value of a connection state of a network cable and an interface-state holding unit 156 that stores information indicating whether or not a communication-processable interface has been set.
FIG. 4 shows a flowchart showing the sequence of a process of activating the network-card-corresponding device driver 131 in the main processor (PPU) 111. In step S11, the device is initialized by reading/writing register values in the device. In step S12, link detection is performed to determine whether or not a network cable has been connected. When a link is detected and a connection of a network cable is determined, the flow proceeds to step S13.
In step S13, interface setting including the setting of an IP address and a maximum transmission unit (MTU) is performed. The processing in steps S11 to S13 so far is performed in the initializing unit 151 of the device driver 131 shown in FIG. 3.
The processing in step S14 is packet sending/reception processing performed in the main processing unit 152. The interrupt processing and the main processing are simultaneously performed in a time-sharing manner in the main processor (PPU) 111. With reference to the flowchart shown in FIG. 5, the flow of the processing in step S14 performed by the main processor (PPU) 111, that is, the flow of packet sending/reception, will now be described.
In response to a request from an application for communication processing, in step S101, the main processor (PPU) 111 reserves a memory region for sending/receiving packets and sets a descriptor corresponding to the reserved memory region in accordance with the device driver 131. In step S102, a notification of the set descriptor information is sent to the network card 101. This notification processing is performed by writing into a register in the network card 101.
In step S103, the network card 101 performs data sending/reception in accordance with the descriptor. In step S104, an interrupt is generated for the main processor (PPU) 111. In response to the interrupt, the main processor. (PPU) 111 performs processing after preset communication processing, such as releasing the memory space.
The processing described with reference to FIGS. 1 to 5 is a processing example where communication is performed by setting up a device driver corresponding to a network card only on a main processor (PPU). In this manner, no problem occurs in the setting where network communication is performed by the single main processor (PPU) by using its own device driver. However, the ASMP environment includes, besides the main processor (PPU), multiple sub-processors (SPUs) having individually different architectures. Therefore, it is conceivable that processing is performed by device drivers that are individually set up on the respective processors.
In this manner, when processing is performed using, not only the main processor (PPU), but also sub-processors (SPUs) using SPU-corresponding device drivers, such as when communication using a network card as a device is performed, the foregoing problem occurs. That is, different device drivers set in correspondence with respective processors are simultaneously operated. In such a case, the problem that not only the corresponding device but also the entire system does not operate properly occurs.